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SN74LVC1G04: SN74LVC1G04/SN74LVC1G07 spice model issue

Part Number: SN74LVC1G04
Other Parts Discussed in Thread: SN74LVC1G07

Tool/software:

Hello, 

I'm trying to look for working spice models for my cadence simulation testbench. 

1) inverter IC:

SN74LVCGU04 seems to be the same as SN74LVCG04.(The behavioral spice models[.cir format] are the same). Looks like, the LTSPICE can read this model. I would like to simulate it with cadence virtuoso, but Iooks to me, cadence tool cannot read some syntax (such as subcircuit and math functions). I remember the gate drive LMG12XX famliy pspice or spectre model works with cadence. how come this one cannot? can you provide a cadence compatible spice model for SN74LVCGU04?   thanks!

2) buffer IC:

Under SN74LVC1G07 website, I downloaded both behavioral SPICE model and PSPICE model. a) I created a LTSPICE symbol with Behavioral one(.cir), but this model cannot generate correct output. for example, I added input (A) with GND(low) or VCC(high), the output is also low. if injecting 5V clock signal at input, VCC/GND/Y will not drain/source any current. I bet this model has some issues. b) I downloaded the PSpice model and tried to simulate it with Cadence. Cadence can read the model, but it seems to have the same issue as the behavioral model. Output is always low, and not current sourcing or draining while input signal toggling. Can you check and modify those two files if any issues?  I would like to verify them in cadence before manufacturing the PCB and assembly. Thanks!

    

  • Hi Hua,

    1. Unfortunately I'm not familiar enough with SPICE simulation on cadence virtuoso to be able to assist you here. We support simulation for TINA and PSPICE for TI (which is also Cadence-developed I believe). 
    2. This is an open drain device. Did you add a pull-up resistor so that the output could drive high?

    Best,

    Malcolm