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SN74AVC4T774: SN74AVC4T774 SCLK Signal Integrity

Bo Ren
Prodigy 30 points
Part Number: SN74AVC4T774

Tool/software:

In our application, SN74AVC4T774 is used as SPI buffer.

The rising edge of SPI SCLK has a back-hook at the input of SN74AVC4T774, and the voltage is around 1.5V. 

The Min of VIH is 2V in SN74AVC4T774 datasheet.

 I would like to ask, is it possibe that the 1.5V back-hook on the rising edge generate an abnormal clock at the output of the SN74AVC4T774?

  • 0
    Guru 316860 points

    First, check that this is not a measurement artifact. When you are using an oscilloscope probe with a ground clip, you might get ringing in the loop formed by that short cable. Better use a ground spring.

    If you have ringing in your circuit, then it could indeed result in double clocking at the output. (Measure the output.) To avoid this, properly terminate the input signal trace. Usually, this is done with source termination, i.e. a series resistor of about 22 Ω or 33 Ω at the driver.