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SN74LVC1G14-Q1: Clarification on Power Dissipation Calculation for Inverting Buffer

Part Number: SN74LVC1G14-Q1

Tool/software:

Part Number: SN74LVC1G14Q1

Dear Texas Instruments Team,

I am currently performing power dissipation calculations for the inverting buffer amplifier PN: SN73LVC1G14QDCKRQ1. In the LVC characterization document, I found two different formulas for power dissipation—one for rail-to-rail inputs and another for TTL level inputs. However, the datasheet for the SN73LVC1G14QDCKRQ1 does not specify which input type the inverting buffer uses.

I would appreciate it if you could confirm whether it is appropriate to use the formula from the LVC characterization document for this purpose. If so, please clarify which of the two formulas—rail-to-rail or TTL level input—applies to the SN73LVC1G14QDCKRQ1.

 For your reference, here is the link to the document I am referring to: LVC CHARACTERIZATION INFORMATION

 

Additionally, the formula includes an internal parasitic capacitance term, which is calculated using dynamic current. Could you please confirm if this dynamic current is the same as the peak current?

 

Lastly, we are using this buffer between two microcontrollers with a 5V PWM signal input. Will this setup lower the output voltage?

Thanks & Regards

Lithesh 

  • 1. These input levels are characteristics of the input signals, not of the device. Anyway, for LVC devices, you should always use rail-to-rail (or higher) signals.

    2. Cpd measures the frequency-dependent part of the supply current. Peak currents during switching are likely to be higher (but are buffered by the decoupling capacitor).

    3. The output voltage is VCC.