SN74AVC32T245: Level Translation from 3.3V to 1.8V

Uday Kumar Urimi

Part Number: SN74AVC32T245
Other Parts Discussed in Thread: TXV0108

Tool/software:

Dear TI,

We would like to understand whether SN74AVC32T245 can meet the switching characteristics of THC63LVD1024 or not while converting 3.3V logic to 1.8V logic.

Thanks

4 months ago

+1 Michael Ikwuyum 4 months ago

TI__Mastermind 33805 points

Hi Uday,

AVC is specified for 100 MHz at 1.8 V. Note that skew is also not specified.

I would further recommend TXV0108 as our latest recommendation for speed sensitive applications, thanks.

Best Regards,

Michael.

0 Uday Kumar Urimi 4 months ago

Prodigy 70 points

Hi Michael

The first page of SN74AVC32T245 says 200Mbps data rate for 2.5V/1.8V translation wherein TXV0108 does not specify any data rate.

Thanks

0 Clemens Ladisch 4 months ago in reply to Uday Kumar Urimi

Guru 285410 points

The propagation delay is specified as 3.8 ns, which corresponds to at least 263 Mbps = 131 MHz.

0 Michael Ikwuyum 4 months ago in reply to Uday Kumar Urimi

TI__Mastermind 33805 points

Hi Uday,

200 Mbps = 100 MHz.

Furthermore, TXV cansupports 500 Mbps at 25 C and 420 Mbps 1.8V to 2.5 V and 400 Mbps 2.5 V to 1.8 V, thanks.

Best Regards,

Michael.

0 Uday Kumar Urimi 4 months ago in reply to Michael Ikwuyum

Prodigy 70 points

Hi Michael,

Thanks for the info. We are looking for 3.3V to 1.8V translation. What are the parameters that are to be looked at while selecting the device?

0 Michael Ikwuyum 4 months ago in reply to Uday Kumar Urimi

TI__Mastermind 33805 points

Hi Uday,

Per your system requirements, you may confirm operating voltages, I/O voltages, input data rate rate spec, propagation delay, output loading, interface type and any other special requirements such as partial-power down etc, thanks.

Best Regards,

Michael.

0 Uday Kumar Urimi 4 months ago in reply to Michael Ikwuyum

Prodigy 70 points

Hi Michael,

We want to level shift 3.3V logic IOs of THC63LVD1024 to 1.8V to interface FPGA

0 Michael Ikwuyum 4 months ago in reply to Uday Kumar Urimi

TI__Mastermind 33805 points

Hi Uday,

I do not see any issue as the above suggestions work well.

To double confirm, what is the data rate frequency of the signal sent from THC to FPGA? And any other FPGA requirements of concern missing in the level-shifter data sheet?

Best Regards,

Michael.

+1 Uday Kumar Urimi 4 months ago in reply to Michael Ikwuyum

Prodigy 70 points

The max data rate which we require is 135MHz. The translation is from 3.3V to 1.8V.

No other specific requirements from FPGA side.

0 Michael Ikwuyum 4 months ago in reply to Uday Kumar Urimi

TI__Mastermind 33805 points

Hi Uday,

I would recommend TXV, thanks.

Best Regards,

Michael.

0 Uday Kumar Urimi 4 months ago in reply to Michael Ikwuyum

Prodigy 70 points

Thanks Michael.

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SN74AVC32T245: Level Translation from 3.3V to 1.8V