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TPLD801: 8-bit counter RST input "device datasheet vs. InterConnect Studio bug"?

Robert Dickerman
Prodigy 20 points
Part Number: TPLD801

Tool/software:

I am attempting to use TPLD801 8-bit counter, but there seems to be a "device datasheet vs. InterConnect Studio" inconsistency regarding the 8-bit counter RST input operation.   

When the counter is configured for Reset Mode = High Level Reset, and RST = 1 (connected to VCC0),  InterConnect Studio simulation shows OUT = 1.  This is inconsistent with TPLD801 datasheet Figures 7-13, 7-14, 7-15 on pp. 29-30, which all show OUT = 0 when (edge = HLR) AND IN = 1.

Therefore, there seems to be a bug in either the simulator or the datasheet.  Am I correct?

  • +1
    TI__Expert 7801 points

    Hi Robert,

    Good eye. This is a datasheet error, and the actual device behaves similar to the simulation. The counter will output HIGH while in reset then on the first clock edge after it will reset go LOW and begin counting.

    Regards,

    Owen