Tool/software:
We have circuits that are failing at various times.
We have 4 to 6 Inverter Logic Gates of this type placed in parallel (both Inputs & Outputs)
Is this not a good practice to do ?
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Tool/software:
We have circuits that are failing at various times.
We have 4 to 6 Inverter Logic Gates of this type placed in parallel (both Inputs & Outputs)
Is this not a good practice to do ?
It is allowed to have the outputs of the gates on a single die in parallel, because their propagation delays match. Multiple dies will not work.
What application is this? Why do you need unbuffered inverters, and how much current do they need to provide?
What if there is a temperature gradient. Propagation delays from cold to hot can vary from ~4ns to 24ns
There must some cases of one gate being on while the another is off for a short amount of time.
Putting 2 in parallel is one thing but more then 2 (such as 4 might in some cases lead to 3 on while the 4th is off for a short amount of time increasing current further)
In an case, if you are aware of a device that can sink/source at least 32mA that come in Die form, that would help (& maybe consider switching to that).
Hi William,
If unbuffered isn't needed we have the SN74LVC1G04 which is rated to +-32 mA at 5V, and comes in EP with SN74LVC1G04-EP. Can I ask why you need a die sale device? The only die sale inverter we have is the one you selected. As Clemens said usually gates within a single die are okay to be tied in parallel, but expanding past a single die you will see slight differences in propagation delay.
Regards,
Owen