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SN74AVC4T774: SN74LVC8T245 - Output state verification

Part Number: SN74AVC4T774

Tool/software:

Hi Team,

Good day!

I am using SN74AVC4T774RSVR part one of my test card and seeking clarification in the design,

-> VCCA is having 3V3 default and Part A inputs is default Pull-down (all inputs are connected in the same signal).

-> OE pins default Pull-down and all the DIR pin is pulled High (Part A to Port B)

But VCCB is 3.3VDC is not supplied until Port A signal drive high from the Master.

In that case, IC will not affect in the standby condition (Signal is Low) and operating condition (signal driver High).

Please suggest me with your insights.

Best Regards,

Gopi.

  • Hello Gopi,

    When using any level translator under the AVC family, we recommend you keep #OE pulled to HIGH to keep I/Os in a Hi-Z state. If VCCA and VCCB are not fully powered while toggling #OE, this can cause glitches at the output. 

    In your case, you have VCCA fully powered, #OE low (this enables the device) and VCCB powered after inputs toggle which can cause unwanted pulses at the output. 

    Regards,

    Josh