SN74HC374: Logic forum

Please specify which waveform corresponds to which pin. Ensure that the clock, input, and output are included.

Please use a higher resolution for the schematic.

Our reply below:

ICT test u4 fail body mark as 48CX1CK and ICT has 8 output states for test u4, I only show one output state E1_Q as a case study, When ICT tests E1_Q fail is shown as the red mark, the ICT test library settings are as follows:

Good unit:

execute E1_D_lo
execute E1_Toggle_Clock
execute E1_Toggle_Clock
execute E1_Q_lo

execute E1_D_hi
execute E1_Toggle_Clock
execute E1_Toggle_Clock
execute E1_Q_hi

We input D1 Low, The output Q1 low as well.

NG unit:

execute E1_D_lo
execute E1_Toggle_Clock
execute E1_D_hi

execute E1_D_hi
execute E1_Toggle_Clock
execute E1_D_lo

We input D1 Low, The output Q1 become Hi . 

Please show an oscilloscope trace of the D, CLK, and Q pins.

We perform internal analysis , Please refer to below: Please read attached report. 

We do comparison test for OK and NG parts,   Simulation test 3 show  Clock input and ID input are same,  But Q output show difference. 

JS2454-F-7045 Failure Analysis Report for CareFusion.pdf

Hello Sir:

Please refer to below our testing: We input same D input and clock input, But Q output is different, Please confirm what's the reason?? 

Hello Sir:

You mentioned Our input signal violates the recommended operating conditions, Could you kindly share us a input signal samples you recommended, we can based on your recommended signal to check them again.