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SN74HCS74: Driving CSD16301Q2A and CSD16327Q3 mosfets and SN74LVC00A NANDS with a D flip flop

Klaas-Jan Winkel
Prodigy 60 points
Part Number: SN74HCS74
Other Parts Discussed in Thread: CSD16327Q3, SN74LVC00A, UCC44273, SN74LVC2G34, SN74LVC125A

Tool/software:

Hi,

I want to drive 1 mosfet with 1 flip flop, and 2 other mosfets + 1 NAND with other flip flop with this ic:

output currents:

SN74HCS74 DFF: absolute max 35ma, no high/low level output current specified.

A)
one Q output is driving a CSD16301Q2A and a CSD16327Q3
and 1 input pin of a SN74LVC00A NAND

B)
the Q output of the other is driving just a CSD16301Q2A

I see that the max input capacitances of the mosfets are respectively:
CSD16301Q2A 340
CSD16327Q3 1300pf

The latter one is absolutely crucial to my design.

I am simulating this with spice models.

I first was driving these mosfets through a 5ohm resistor. They seem to max out at +-70ma in the simulation.

When i change it to 50 ohm, it is around +-20x20ma=40ma in case (A), and 32ma in case.

These are very short pulses though (it spends 8 nano seconds above 24ma in case B).

Is it a problem to drive the mosfets in case A and B with the logic gates above with 5 ohm resistors and 70ma simulated going from the logic to the gate.

And in general: is it a problem that there are short pulses above the maximum rating?
I really have trouble finding clear information on this.

I have also tested with a SNx4LVC74A DFF. This has a max output current rating of 24ma. Why does the HSC does not have this and to what, if needed, i should limit the current for the HSC DFF.

Also: can i directly connect the above mentioned NANDS/DFF's with without current limiting resistors?

regards,
Klaas-Jan

  • 0
    Prodigy 60 points

    Some other details:

    - The complete circuit simulates correctly

    - I need to switch as fast as possible (ns range), but not often (us range or even ms range)

    - I prefer not to use current limiting resistors for the gate above 50, and certainly not above 100ohm

    - If i need a gate driver, do you have advice about driver ic's for this (logic level, right?) mosfets?

  • 0
    Guru 316440 points

    Logic gates can drive a capacitive load of up to 70 pF directly. For larger loads, you have to add a series resistor to limit the current to a safe value, as specified in the absolute maximum ratings. (The logic gate's output impedance and the MOSFET's gate resistance also limit the current.)

    To increase drive strength, you can use multiple CMOS outputs in parallel.

    If that is not enough, use a gate driver like the UCC44273.

  • 0 in reply to Clemens Ladisch
    Prodigy 60 points

    Hi, thanks for you reply. Do you also have a suggestion for a 3v level gate driver?

  • 0 in reply to Klaas-Jan Winkel
    Guru 316440 points

    There are no gate drivers below 3.5 V. (The CSD16327Q3 has specifications for 3 V, but this is not a typical gate voltage for 1 nF MOSFETs.)

    If possible, consider using a gate voltage of 5 V or more. (The UCC44273 accepts lower input voltages.)
    If you must drive the gate with 3 V, your only choice is to use multiple logic buffers in parallel, or to build a discrete gate driver.

  • 0 in reply to Klaas-Jan Winkel
    Prodigy 60 points

    Do you have a way to calculate the absolute minimum resistor value i need for these configuration A/B i mention above? Cant find any formula that actually matches the simulation. the SN74HCS74 also doesn't mention anything about output impendence. Also this DFF only specifies maximum amp rating continuous. I have two questions about that: will the ic function at this max rating of 35ma? And as this is specified as continuous, can the peak be higher like 70ma?

    The UCC44273 is a 5V supply driver. I have a minimum supply of 3V and am having a hard time finding a driver with that kind of supply for N mosfet low side switching in a relatively small package.

  • 0 in reply to Klaas-Jan Winkel
    Prodigy 60 points

    So discard the last question. 

    The first one i can also put more simple, would 50 or 100 ohm gate resistor limit current enough for cases A/B above

  • 0 in reply to Klaas-Jan Winkel
    Prodigy 60 points

    Last question: if i use a buffer can this 'support' the flip flop output as in, the flip flop output goes to the mosfet gate, but also to the buffer, and this buffer's output goes to the same gate?

  • 0 in reply to Klaas-Jan Winkel
    Guru 316440 points

    There is no separate peak current specification; you must never exceed the specified limit.

    HCS drive strength is too low. With a 3 V supply, LVC outputs have a typical output impedance of about 12 Ω, so a 56 Ω resistor should work. To increase drive strength, use the outputs of the SN74LVC2G34 in parallel, or even multiple devices.

    Due to the additional propagation delay, you should not connect the flip-flop's and the buffer's outputs together.

  • 0 in reply to Clemens Ladisch
    Prodigy 60 points

    Hi,

    I have discovered that i do not need to drive the mosfets that fast.

    Still, to isolate the problem i have put a SN74LVC125A buffer (actually i should have used you suggested SN74LVC2G34, but the 3v rating for output current is the same) in the spice design that only drives the 2 mosfets. I have added current limiting resistors of 270ohm for each to keep the driving current at 23ma as per the max rating in the datasheet:

    This simulates very well in the total design. The NAND gate is still driven by the flip flop

    Now, when i remove the buffer again and drive the mosfets + NAND gate with the flip flop, which has the same max current ratings i also need to drive the NAND, which, with a 5pf input capacitance, the peak current is of course going higher to about 77ma for about 328pico seconds.

    So now I cant follow your advice: " you must never exceed the specified limit".

    And this is a contradiction anyway as you name 2 rules:

    - under 70pf input capacitance i dont need a driving resistor, which exceeds the limits for about 1ns around 40ma if i drive just a nand gate from a DFF

    - and you should not go over the limits, which it does.

    Thats why i separated the problem with a buffer, simulated and removed it again. The mosfets are driven with not more then 23ma, but the NAND makes this exceed again. It this safe, to connect a 5pf NAND together with 23ma current limited mosfets?

    Also, the mosfets have a gate capacitance of 1600pf combined, how do you are at 12+56 ohm? Im getting 45ma peak current in simulation with the buffer you mentioned.

    regards,

    Klaas-Jan

  • 0 in reply to Klaas-Jan Winkel
    Prodigy 60 points

    Actually: if i simulate the same circuit with the SN74LVC2G34 i get around 12ma current with the same driving resistors. Can i actually trust these logic gate models? Does all LVC logic not have the same output impedance?

  • 0 in reply to Klaas-Jan Winkel
    Guru 316440 points

    When the load is less than 70 pF, you do not need to care about the current limit.

    I've used the absolute maximum rating of 50 mA for LVC outputs. The recommended operating conditions guarantee the VOL/VOH limits, but for driving a MOSFET, you do not care about those.

  • 0 in reply to Clemens Ladisch
    Prodigy 60 points

    Yes, but i am saying im driving a mosfet AND a NAND gate. So i do care about Vol/Voh, and the load in the worst case is now 1600pf + 5pf NAND. So what then to do? Then i think i have to keep it at 24ma. Do i keep then the 1600pf load at 24 and should i then not care about the 5pf NAND load? Or should i isolate the NAND input from the mosfet gate with a buffer?

  • 0 in reply to Klaas-Jan Winkel
    Guru 316440 points

    You can drive the NAND input directly from the flip-flop's output, before the resistor.

  • 0 in reply to Clemens Ladisch
    Prodigy 60 points

    Hi Clemens, ok, thats what i am going to do then! thanks for your help.

  • 0 in reply to Clemens Ladisch
    Prodigy 60 points

    This might be a superfluous question, but can i also drive 2 NANDS before the resistor? im asking this because in the simulation i then see the DFF outputting currents up to 600ma + ringing and peaks of higher then 5v. Can i ignore that?

  • 0 in reply to Klaas-Jan Winkel
    Guru 316440 points

    Yes; one logic output can drive many logic inputs.

    The simulation is likely to be wrong, but I do not know the details.