Tool/software:
Hi,
We are using SN74LVC1G97 in our 3.3V system, how much is the input leakage current @ IN1, IN2 and IN3, when it is pulled by 3.3V? Thanks!
Regards,
Wei
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Tool/software:
Hi,
We are using SN74LVC1G97 in our 3.3V system, how much is the input leakage current @ IN1, IN2 and IN3, when it is pulled by 3.3V? Thanks!
Regards,
Wei
Hi Wei,
When you say pulled by 3.3V, do you mean the vcc = 3.3V?
TI only provides the worst case information / maximum leakage current per pin for this part. which is 5 ua. That being said, I'd expect the real value to be much lower.
Best,
Ian
Yes; the input is 5.5 V, and the test is valid for all supply voltages (VCC does not matter).
For practical purposes, temperature has a much larger influence on the leakage current than voltage. If your circuit can run at 125 °C, then you have to design it for 5 µA; at lower temperatures, the leakage is orders of magnitude lower. Below are typical values for some other device:
Hi Wei,
This is not a graph of the typical values. This is a graph of the max value. We only report on the maximum value for leakage current. As Clemens mentions, the Vcc would have little input on the maximum leakage current compared to other factors, so the 5 uA value is valid for the Vcc = 3.3 V case.
Best,
Ian
Hi,
From this thread: https://e2e.ti.com/support/logic-group/logic/f/logic-forum/873280/faq-what-is-the-impedance-of-the-device-s-input-pin-is-it-cmos-or-bipolar-device?tisearch=e2e-sitesearch&keymatch=SN74LVC1G125#, my understanding is, if Vcc and Input voltage @ input pins are all 3.3V, the input leakage current should be nA, because it is in low power operation, is it correct?
Regards,
Wei
Hi Wei,
We would expect the leakage current to be in nA most of the time, but we only report the maximum value in the datasheet and don't guarantee a typical value for this part.
Best,
Ian