LSF0204: Schematic review and relevant question

Yishan Chen

Intellectual 1740 points

Part Number: LSF0204
Other Parts Discussed in Thread: TXU0304

Tool/software:

Hi Team,

Could you please review customer's schematic and check below question about their usage?

Usage:

They use two power source to power Vref_A(1.8V DSP), EN and Vref_B(3.3V MCU IO)

The Enable Pin voltage is set by resistor divider from 3.3V MCU IO, same power source to power the V_REF B.

They want to control A to B channel be the HIZ status when the Enable pin is low(Control by the MCU internal Logic) because the MCU_P3.3V can not be powered down in their application.

Could they use LSF0204 like this?

Thank you,

Yishan Chen

6 months ago

0 Clemens Ladisch 6 months ago

Guru 317320 points

The EN pin is overvoltage tolerant and can be driven with 3.3 V.

The total pull-up current on the lines is about 7 mA. Are your devices ables to drive this?

The TXU0304 would be easier to use.

0 Yishan Chen 6 months ago in reply to Clemens Ladisch

TI__Intellectual 1740 points

Hi Clemens,

Thank you for your reply.

To be clear, you think there are not issue with current schematic if two power source can output 7mA current and directly drive EN pin with 3.3V signal?

Thank you,

Yishan Chen

0 Clemens Ladisch 6 months ago in reply to Yishan Chen

Guru 317320 points

The question is not about the power supplies, but about the two SPI devices (master and slave). Their SPI pins must have a drive strength of at least 7 mA; especially a 1.8 V device might have problems with this.

0 Yishan Chen 6 months ago in reply to Clemens Ladisch

TI__Intellectual 1740 points

Hi Clemens,

Understood.

If the 1.8V SPI pin can drive 7mA current, no issue with their schematic and configuration?

Thank you

Yishan Chen

0 Clemens Ladisch 6 months ago in reply to Yishan Chen

Guru 317320 points

Yes.

0 Jack Guan 6 months ago

TI__Mastermind 41076 points

Hi Yishan,

The TXU0x04 can also be realized here, similar to Clemens' suggestion. If implemented instead, all external pullups at I/Os can be removed and the OE pin can be referenced to both VCCA or VCCB. This would help to simplify design and reduce BOM, while providing additional DC drive strength over the LSF0204 for this application.

Regards,

Jack

0 Yishan Chen 6 months ago in reply to Jack Guan

TI__Intellectual 1740 points

Hi Jack and Clemens,

Since customer are already put LSF0204 in their board, so they may not change to TXU0X04.

Based on your advices, customer revised their schematic like below, could you please help to check their schematic?

One more question is:

when the V_REF B is powered and V_REF A is not powered, what is the status in data lane? Would EN pin still be useful to control the data transmission?

Thank you,

Yishan Chen

0 Jack Guan 6 months ago in reply to Yishan Chen

TI__Mastermind 41076 points

Hi Yishan,

EN should not be biased above VREFA voltage to ensure proper biasing for ch FETs. In this case, biasing the EN pin to DS_P1V8 is needed.

Yishan Chen said:
when the V_REF B is powered and V_REF A is not powered, what is the status in data lane? Would EN pin still be useful to control the data transmission?

Yes the voltage at the EN would still enable the device if biased high and the ch FETs can be influenced.

Regards,

Jack

0 Yishan Chen 6 months ago in reply to Jack Guan

TI__Intellectual 1740 points

Hi Jack,

I am confused now.

Clemens said the EN pin can withstand 3.3V IO, so I just recommend customer to directly connect it with MCU 3.3V IO.

Could we connect EN pin with 3.3V?

Jack Guan said:
Yes the voltage at the EN would still enable the device if biased high and the ch FETs can be influenced

Even if only V_REF B is powered?

Thank you,

Yishan Chen

0 Clemens Ladisch 6 months ago in reply to Yishan Chen

Guru 317320 points

For LSF010x devices, EN would be an analog input for the bias voltage.
For the LSF0204, EN is a plain digital input and accepts up to 5.5 V.

In any case, to disconnect both sides, you must pull EN low.

0 Yishan Chen 6 months ago in reply to Clemens Ladisch

TI__Intellectual 1740 points

Hi Clemens,

Customer now directly put EN to 1.8V Vref_A.

When they only power Vref_B to 3.3V, they saw 0.65V voltage in Vref_A, what is the reason here? Will the 0.65V still there when they connect EN pin to 3.3V IO?

Thank you,

Yishan Chen

0 Clemens Ladisch 6 months ago in reply to Yishan Chen

Guru 317320 points

In order to disable the I/Os, EN must be pulled low. You can use a 3.3 V signal for EN (which is switched to 0 V when the 1.8 V supply is powered down).

0 Yishan Chen 6 months ago in reply to Clemens Ladisch

TI__Intellectual 1740 points

Hi Clemens,

Their concerns is the presence of 0.65V when Vref_A is not powered and Vref_B is powered.

Could you please explain this phenomenon?

Thank you

Yishan Chen

0 Clemens Ladisch 6 months ago in reply to Yishan Chen

Guru 317320 points

During normal operation, a small current flows into Vref_B and out of Vref_A. This current can charge up C281.

To prevent this, EN must be forced to 0 V.

0 Jack Guan 6 months ago in reply to Clemens Ladisch

TI__Mastermind 41076 points

Hi Yishan,

This voltage measured at the EN is expected, due to the internal connection between the EN and VREFB to allow the device to properly perform translation. As Clemens' suggested, the EN pin needs to be driven 0V i.e open drain driver to effectively disable the device.

Regards,

Jack

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LSF0204: Schematic review and relevant question