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UCC28070: MOS damage issue

Part Number: UCC28070

Tool/software:

Hi expert

my customer use UCC28070 for a new design, while they did the aging test, there are MOS damage issue. the failure rate is about 2/40.

the power is about 650W. VIN=230Vac. The picture is the current result of MOS which test on the issue board(replace new MOS), while output power is higher than 500W, we can capture some of peak current, maybe this is the root cause of the MOS damage. do you have any suggestion of this issue? is this peak current normal? 

UCC28070(创维).01.pdf

pink wave is MOS current of channel 1, blue  wave is MOS current of channel 2, yellow wave is sample current of channel2

  

  • Hello Feeney, 

    I will need more information about this design and the test conditions when the MOSFET failed. 

    However, the peak currents you show do not seem high enough to me to cause a failure, even if they are undesired.  That is a different issue. 

    In your schematic file I find this inrush-protection circuit: 

    Since this is a semi-bridgeless PFC, this bypass connects from the Line and Neutral to the output capacitors.

    Placing the inrush-surge limiting resistor RT2 in this path is ineffectual.  In other words, it does not work.  It will not prevent peak surge current into the output caps on AC power up, or on dropout recovery. Instead, inrush current will flow through the inductors.

    If the MOSFETs begin switching during one of these surges and the inductor is saturated, this can allow excess current to damage the MOSFET.
    I think this may be the main possibility for causing the failure, if the aging test includes AC power cycling.  

    I recommend to move the RT2 to be in series with Line or Neutral nets. 

    Regards,
    Ulrich