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Original question:
Tool/software:
Hello,
I saw you released a 1.4.0 by end of February.
Is the bug I found the one stated as fixed in that version ?
Best regards,
Clément
Hi Clement,
There wasn't a bug. You need to probe the CLK input to the watchdog timer, and the timing will update appropriately. For some reason with the SPICE engine, if you do not save the CLK voltage the watchdog output timing is off. Unfortunately, this isn't something I know how to fix beyond just probing the pin since it seems to be more of an engine limitation.
Probing the CLK pin saves the voltage and corrects the timing but does make the simulation take significantly longer to run. Here is an abbreviated snippet of the simulation, showing a more accurate pulse width, where all I did is probe the CLK pin on the WDT:
Hard to read, but the timing is about 25us, which matches with hardware.
Best,
Malcolm
