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Using TXS0104E to convert 5V SPI signal to 3.3V SPI signal, Clock transitions observed to generate noise on LE (slave select) line

Dwijen Pandya
Prodigy 10 points
Other Parts Discussed in Thread: TXS0104E

Hi,

I am using TXS0104E level translator to translate 5v SPI signal comming from my processor to give to 3.3V compatible slave.

When I am observing SPI data at the output of the level translator it shows spikes on the LE line due to clock and data transitions. Due to this spikes my communication is being terminated prematurely.

I have applied 100pF capacitor between LE line and ground. Due to this spike level is reduced to 0.6V and now data is being written properly. But still solution is not full proof. If I write same data 3-4 times then one time out of those attempts it would write prefectly (earlier it was not even writting one time).

Can anyone suggest me any full proof solution to remove spikes on one line of TXS0104E due to transition on other lines? I have already kept 0.1uF decoupling capacitor between supply and ground.

Can anyother part is recomended for same operation. My requirement is 5v to 3.3v translator with supporting upto 1mbps datarate and strictly in TSSOP package.

 

Regards,

Dwijen Pandya

RF Design Engineer

  • 0
    TI__Genius 9085 points

    Can you adjust the layout to reduce the coupling between the LE and the other lines?

    Is there anything you can do to increase the rise time on the other lines?

    Is the noise on the power rail? If the spike is seen on the power rail, you may try increasing the bypass capacitor.