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TXS0102: maximum bus capacitance and OE pull-down value

doner_t
Intellectual 645 points
Part Number: TXS0102
Other Parts Discussed in Thread: LSF0102

Tool/software:

Hi,

I want to use TXS0102 on my design to translate I2C lines at 100kHz and 400kHz.

  • Seen this device has edge accelerators to improve rise times. what is the maximum bus capacitance so that this device is able to drive lines for proper operation and signal integrity? 20cm PCB trace is problem for device?
  • What is the recommend value for pull-down resistor for OE pin? Do I need an open drain out to drive this OE pin? I want to enable/disable this device through an FPGA pin with LVCMOS18 type output. Is it OK? 

Best Regards,

  • 0
    Guru 317370 points

    1. 20 cm is no problem.

    2. You have no speed requirements, so just use 10 kΩ. (If you do not care about the state of the I/Os during power up, then you can connecte OE directly to VCC.)

  • 0 in reply to Clemens Ladisch
    Intellectual 645 points

    Thanks ,

    - I'm confused if I use LSF0102 or TXS0102. LSF0102 requires an open drain out for drive OE pin. So, I prefer TXS0102. But isn't there a bus capacitance value or maximum PCB trace & cable length parameters for TXS102? (i.e: something 30pf or 1-meter for 10MHz?)

    -I may need enable/disable device during operation. So, I will connect it to FPGA. OE pull-down value is seen a few 100kOhms in some reference. Is it OK? 

    Thank you.

  • +1 in reply to doner_t
    Guru 317370 points

    The LSF does not have an OE input; what it does have is the EN pin, which is connected directly to the MOSFET gates and must be part of a bias voltage circuit.

    The TXS edge accelerators time out before the voltage has reached VCC at roughly 200 pF.

    Pretty much any pull-down value is OK. Small values waste power; large values are more sensitive to induced noise.