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SN74LVC1G125: Spice Model not showing high impedance state when OE is disabled

Anandhu Raj
Prodigy 40 points
Part Number: SN74LVC1G125
Other Parts Discussed in Thread: SN74LVC1G126

Tool/software:

Hello,

I was simulating SN74LVC1G125 in LTspice with output pulled up to 5V through 10kOhm resistor and a toggling input which oscillates at 10kHz.

Since SN74LVC1G125 has tristate behaviour, when the OE is disabled, simulation should show 5V at output pin(owing to pull-up) irrespective of the input. However, the simulation results show logic Low level at output when OE is disabled.

I observed same behavior with SN74LVC1G126 also. Could you please let me know how to correct the model to rectify this error?

 

Thank you,

Anandhu Raj