Other Parts Discussed in Thread: TLV1851, SN74HCS125
Tool/software:
I've used this logic buffer (schmitt trigger) to receive a discrete signal which voltage can go from +15V to 0V.
A 12Kohm resistor connected to +15V provides the high level of the discrete line while a simple NPN transistor is used to drive the line to GND. The discrete signal captured at the NPN collector is sent through a 75Kohm resistor to the logic buffer (supplied at 3,3V) in order to provide discrete status at a FPGA.
The circuit works properly, my doubt arise when i've read that no "positive clamping diode" is present at the input of this gate. From the absolute maximum ratings, only the negative input voltage can be exceded if the flowing current is kept under the limit, but, what happens for the exceeding positive voltage?
When the discrete is open, the voltage at the input of the buffer is around 8,5V, showing me that no clamping diode is present as declared in the datasheet. Is it true that the current flowing through the input is limited by the 75Kohm resistor but the fact that the voltages exceed the maximum rating, doesn't make me feel quite.
My question, from a technical point of view, especially related to the technology of this gate, is:
may the gate work properly with this configuration or am i risking to broke the device in the future?
Otherwise: do you have a similar component (schmitt trigger) even working with single supply (3,3V) that implement the classic "back to back" diode at the input level?
Thanks in advance for your attention
Marco
