Tool/software:
If more than 3 Delay modules are in design, the design fails when CONFIGURED to the part in eval board. The simulation works.
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Tool/software:
If more than 3 Delay modules are in design, the design fails when CONFIGURED to the part in eval board. The simulation works.
Hi Arsen,
Could you attach the design's syscfg file for debugging? Also, what package/EVM version are you using?
Best,
Malcolm
Hi Malcolm,
Sure thing. Here it is attached, and it's TPLD1202 nsot-14 on the eval board
I think I can see what goes on, but I'll wait for your input.
Hi Arsen,
I'm in Europe this week on business. I asked someone else on the team to take a look and hopefully they will get back to you this week. If they don't I will get back to you when I return to the United States next Monday.
Best,
Malcolm
Arsen,
Sorry about the long response on this. I thought someone else had gotten back to you.
For what it is worth, using the latest version of ICS (1.5.0, downloadable from our website) and on a DYY-14 EVM, I do not see any problems. The design works as expected on the board, with the channels lighting up in sequence like they do in the simulation.
Best,
Malcolm