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SN74LVC2G157: Does it support 100 MHz CMOS/LVCMOS signals as inputs?

Part Number: SN74LVC2G157
Other Parts Discussed in Thread: SN74AUC2G08, SN74AUC1G04, SN74AUC1G32

Tool/software:

Hi Team,

I’m looking for a suitable 2:1 multiplexer that meets the following requirements:

  • Supports 100 MHz CMOS/LVCMOS signals.

  • Inputs come from:

    • An external oscillator

    • An MCU PLL clock output

  • The I/O voltage levels range from 1.8 V to 3.3 V.

  • The multiplexer should have a select pin to choose between the two input signals.

  • Ideally, the multiplexer should be capable of level shifting (e.g., converting a 3.3 V MCU PLL clock to a 1.8 V output) without requiring external level shifters.

Could you please suggest a TI part that fits these requirements?

Thanks in advance!

  • The only logic family that supports 100 MHz at 1.8 V is AUC. There is no AUC multiplexer, but you could build your own (use two AND gates (SN74AUC2G08) to force the unwanted input signal to GND; combine the two outputs with an OR gate (SN74AUC1G32); if you do not want to use two control signals, generate the inverted control signals with the SN74AUC1G04).

    AUC inputs are overvoltage tolerant.