SN74LVC7001A-Q1: AND Gate Inputs Tied Together

DAVID SABALESKY

Prodigy 225 points

Part Number: SN74LVC7001A-Q1

Tool/software:

Hello Forum,

I have an option on my pcb.

1. Tie both AND Gate inputs together, slow moving signals.

2. Tie one input to VCC through pullup resistor., the other to the slow-moving signal.

Although this maybe be trivial, with both tied together this removes one resistor from the BOM.

Are there any issues that may arise with inputs tied together and when the input signal is very slow?

Just curious...

Thank you,

David

3 months ago

0 Clemens Ladisch 3 months ago

Guru 316690 points

Slow-moving signals generate high shoot-through currents at each input. (But if you cared about power consumption, you would use comparators.)

0 DAVID SABALESKY 3 months ago in reply to Clemens Ladisch

Prodigy 225 points

Hi Clemens,

The slow moving signal or more steady state signals comes from the Q output of a DFF.

I should rephrase or use the word steady state signal CMOS output term.

What is the better solution:

1. Tie both AND gate INPUTS to each other. This saves a pullup resistor and via to VCC.

2. Use a pullup on one of the AND gate INPUTS and route the DFF Q output directly to the other input. This case uses an additional resistor on the pcb BOM.

Sincerely,

David

0 Clemens Ladisch 3 months ago in reply to DAVID SABALESKY

Guru 316690 points

The input capacitance and leakage current are so low that it does not matter. So you can tie them together.

Logic

Logic forum

SN74LVC7001A-Q1: AND Gate Inputs Tied Together