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SN74LVC244A: Input and Output Signal Instability Issue

Tom Tsao
Expert 1850 points
Part Number: SN74LVC244A
Other Parts Discussed in Thread: SN74HCS244, SN74HCS541, , SN74LV244A

Tool/software:

Hello TI Team,

We are using the SN74LV244, and observed that when a 3.3V PWM signal is applied to the input, both the input and output become unstable for a very short period during the PWM signal transitions.

We have attached the schematic of our test circuit as well as oscilloscope waveforms showing this issue. The instability occurs briefly during the PWM edge transitions, where both the input and output signals show unexpected oscillation or ringing.

Could you please help us understand:

  • What might be causing this behavior?

  • Could it be related to slow edge rates, input thresholds, or missing pull-up/down resistors?

Thank you for your assistance!

  • 0
    Guru 316940 points

    This is indeed caused by slow edges. The datasheet forgot to specify the Δt/Δv limit, but it exists, and like with other LVC inputs, with a 3.3. V supply, it's 10 ns/V.

    The circuit deliberately slows down the edges, so I guess you have a reason for that. To be able to handle slow edges, you need a buffer with Schmitt-trigger inputs, i.e., SN74HCS244 or SN74HCS541 (there is no P2P replacement).

  • 0 in reply to Clemens Ladisch
    Expert 1850 points

    Hi Clemens,

    We cannot accept the explanation that the datasheet simply forgot to specify this parameter. In fact, we have been using this part in this circuit for over 10 years without ever encountering this issue. The problem has only occurred with the SN74LVC244A parts we recently purchased. On the same board, if we replace them with SN74LVC244A parts purchased in the past, the issue does not occur.

    Given this situation, would you recommend submitting a failure analysis request?

    Thanks!

  • 0 in reply to Tom Tsao
    Guru 316940 points

    Sorry, I was looking at the LVC datasheet, not at the LV datasheet. The SN74LV244A datasheet does include the Δt/Δv specification (and for LV, it's 100 ns/V).

    The change you are seeing comes from PCN#20221216004.1. The new die conforms to the guaranteed datasheet limits, so the datasheet did not change.

    Your problem is not considered a failure because your circuit goes beyond the datasheet limits.

  • 0 in reply to Tom Tsao
    TI__Mastermind 38085 points

    Hi Tom,

    To clarify more of this issue and have a more official explanation (Clemens is not a TI employee, just a very helpful and knowledgeable person on E2E).

    Before the PCN (new process and new die), the old device was less powerful compared to the new device. This made it so when the device encountered slow edges, it would not even try to switch the output because sometimes it would not have the strength to.

    With the new device, it now has the capability to drive the signal high, but because the input signal is very slow in the switching region, it is constantly trying to switch the output, This is what is causing the oscillations. It is a very common phenomenon in CMOS logic (see: Implications of Slow or Floating CMOS Inputs). Unfortunately, your usecase has been outside of datasheet specs for the past 10 years and does not count as a failure on TI's part. 

  • 0 in reply to Clemens Ladisch
    Expert 1850 points

    Dear  Clemens and Albert,

    I think I understand the reason now.

    Thank you for your reply and help. Wishing you a wonderful day!

    Best regards

    Tom