LSF0002: A and B side in 1.2V to 1.8V application

Igor Orlovich

Part Number: LSF0002
Other Parts Discussed in Thread: LSF0102

Tool/software:

Hi, reading through the datasheet for the 1.8V to 1.2V bidirectional application, it's a bit confusing which side is A and which side is B for the reference voltage usage .
Are pins labeled A1/A2 the VEXT.A side, and B1 /B2 the VEXT. B side or is the side determined by where the VBIAS is connected?

Per Table 8.2 VEXT.A is supposed to be lower than VEXT.B and connected to VBIAS.

In 8.2.1.2.1 it states that "For the bidirectional translation configuration (higher voltage to lower voltage or lower voltage to higher voltage), the VBIAS input must be connected to VEXT,A."

But then Figure 8-1 below VEXT,A is connected to the B side and VBIAS. But then shouldn't side A be the lower voltage signal in this case?

2 months ago

+1 Clemens Ladisch 2 months ago

Guru 316440 points

The datasheet indeed appears to be inconsistent.

But it does not matter which side is A or B; the device is perfectly symmetrical. The only requirement is that V_BIAS is not higher than any of the pull-up voltages.

0 Igor Orlovich 2 months ago in reply to Clemens Ladisch

Prodigy 180 points

Indeed, that datasheet needs some proofreading and cleaning up as there are sections obviously copied from LSF0102 verbatim. So I read it as whichever side is connected to VBIAS is now the VEXT.A?

0 Clemens Ladisch 2 months ago in reply to Igor Orlovich

Guru 316440 points

Yes, VEXT.A must be the lower voltage. (This is a silly name, because using the VEXT.A pullups with the B pins looks as if it were an error.)

0 Igor Orlovich 2 months ago in reply to Clemens Ladisch

Prodigy 180 points

Thank you!

Related question- what will these things do if I have the higher voltage is present (1.8V in this case) but the lower voltage (1.2V) is further down in the system sequencing? So there is a window of time when Vbias/B pins have no voltage applied to them but A pins have 1.8V already present.

+1 Jack Guan 2 months ago in reply to Igor Orlovich

TI__Mastermind 39946 points

Hi Igor,

Thanks for pointing out the error in Figure 8-4, it will be addressed accordingly in the next revision update. In regards to your second question, if no voltage is present at Vbias and it is held at GND despite signals on A-side present, then the B-side will not influenced by the signals on A-side.

Regards,

Jack

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LSF0002: A and B side in 1.2V to 1.8V application