AFE7950EVM: Reg-Onboard sampling Clock query

Part Number: AFE7950EVM
Other Parts Discussed in Thread: TRF1208, AFE7950

Tool/software:

Dear sir,

We are working  on AFE7950+TRF1208 EVM,While validating the On Board Clock,We got error while configuring the below parameter.

code snippet,"

##############        Top Level            ##############
sysParams.FRef            = 500
sysParams.FadcRx        = 3000
sysParams.FadcFb        = 3000
sysParams.Fdac            = 3000*4
sysParams.externalClockRx=False
sysParams.externalClockTx=False
sysParams.RRFMode = 0    
                                    
##############        Digital Chain        ##############

        #####    RX    #####       
sysParams.ddcFactorRx    =    [8,8,8,8]            #DDC decimation factor for RX A, B, C and D"

code snippet,"

##############        LMK Params        ##############
lmkParams.pllEn            = True #True
lmkParams.inputClk        = 122.88 # Valid only when lmkParams.pllEn = False
lmkParams.lmkFrefClk    = True
lmkParams.sysrefFreq    = 3.90625
setupParams.fpgaRefClk    = 187.5 # Should be equal to LaneRate/40 for TSW14J56"

Error we Got :  "LMK Div factor from Input Frequency to device Ref 5.89824 is not supported. Choose a different FRef to the Device or LMK input clock."

But while giving the below configuration it is working ,

"sysParams.FRef            = 491.52
sysParams.FadcRx        =2949.12
sysParams.FadcFb        = 2949.12
sysParams.Fdac            = 2949.12*4

##############        LMK Params        ##############
lmkParams.pllEn            = True #True
lmkParams.inputClk        = 122.88 # Valid only when lmkParams.pllEn = False
lmkParams.lmkFrefClk    = True
lmkParams.sysrefFreq    = 3.84
setupParams.fpgaRefClk    = 184.32 # Should be equal to LaneRate/40 for TSW14J56"

Note:Onboard Clock is 122.88MHz.

My question is why while configuring the 500Mhz  as Fref, it showing an error?

Also why the Sysref Freq is mentioned while running the code?

Also how to calculate the Sysref  Freq?

  • Hi Venkat,

    Using the onboard clocking it is not possible to generate 500MHz Fref as the VCXO is 122.88MHz. If you would like to use a Fref of 500MHz you should use the below LMK settings and apply an external 1.5GHz clock to SMA J14, LMK_CLK_IN. The LMK will then divide the 1.5GHz down to provide the 500MHz to the AFE and 187.5MHz to the FPGA. 

    lmkParams.pllEn            = False
    lmkParams.inputClk        = 1500 
    lmkParams.lmkFrefClk    = True
    setupParams.fpgaRefClk    = 187.5 

    Regards,

    David Chaparro