SN74LVC2G17

Michal Domaszewicz

Other Parts Discussed in Thread: SN74LVC2G17, SN74AUP1T17

Hi,

I would like to use SN74LVC2G17 to translate logic levels from 2.8V CMOS to 3.3V. The buffer operational voltage is 3.3V. Vt+ (positiv-going input threshold voltage) is the most crucial parameter for my application. The datasheet give Vt+min and Vt+max for 3.0V VCC. I did not find that information in IBIS file too. Could you tell me Vt+ voltage level for 3.3V VCC?

over 13 years ago

0 Chris Cockrill over 13 years ago

TI__Mastermind 46480 points

The VT data was taken at worst case conditions which is 3V for 3.3V Vcc. That is Vcc of 3.3V +/- .3V

The data is taken across temp, process and voltage and worst case values are used for limits.

I was unable to find any data taken at 3.3V

0 Edwin Krasser over 13 years ago

Expert 2420 points

Hi,

why do you want to use a level shifter? I suggest to connect the 2.8 V CMOS signal directly to the 3.3 V inputs. If I assume 70% as hi threshold (0.7*3.3=2.31), you will not get any problems with 2.8 V CMOS signals.

Best regards,
Edwin Krasser

0 Michal Domaszewicz over 13 years ago in reply to Edwin Krasser

Prodigy 30 points

Hi Edwin,

Thanks for your response. Unfortunately I can not connect output signal directly with input. My input buffer has Vih typ. = 0.8*VCC, so it is about 2.6V. Output buffer is specified as CMOS 2.8 and datasheet says that output voltage can have value from 2.0V to 2.8V. If the output buffer is not loaded everything should be fine, but 200mV voltage margin is not enough for me.

Best regards,

Michal Domaszewicz

0 Chris Cockrill over 13 years ago in reply to Michal Domaszewicz

TI__Mastermind 46480 points

Here is a part that would work well but it would require 2 of them. SN74AUP1T17

0 Michal Domaszewicz over 13 years ago in reply to Chris Cockrill

Prodigy 30 points

Hi Chris,

Thanks for your response. I thought about using this buffer but unfortunetly it does not suit to my application. My CMOS 2.8V buffer has Vol voltage in range 0V-0.8V. So it is possible that false '1' may appear at the output of buffer SN74AUP1T17.

Best regards,

Michal Domaszewicz

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SN74LVC2G17