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LSF0101: Application Review Request for LSF0101 in PECI Interface Translation

Gireesh Nair P
Prodigy 50 points
Part Number: LSF0101


Tool/software:

Hi TI Team,

We are planning to use the LSF0101 for translating Intel's PECI interface, which operates at 1V, to 3.3V to interface with an FPGA that operates at 3.3V.


For your reference, we’ve attached the block diagram of our proposed setup.

As you may know, PECI is a push-pull, bidirectional signal that operates at speeds up to 2 Mbps.

Could you please review our application and confirm whether the LSF0101 is suitable for this use case?

We would appreciate it if you could share any concerns or limitations you foresee with this approach.

Thank you for your support.

Regards,
Gireesh P

  • 0
    TI__Mastermind 49228 points

    Hi Gireesh,

    I don't see a problem with this implementation as long as the correct connections are used similar to figure 9-1. 

    You are not using an open-drain driver, but this would be the correct diagram for a push-pull driver as well. 

    You would need to ensure that when driving from the 1 V side, that the PU resistor on side 2 is correctly sized so that it pulls the signal up to 3.3V the rest of the way when the "SW" goes high-impedance. This is similar to figure 6-1

    The blue waveform is push-pull, the red waveform follows the blue waveform until it reaches past the threshold voltage of the "SW" block. Then the red waveform is pulled up to 3.3V by the PU resistor on side 2. Depending on your capacitance on side 2 will determine the size of your PU resistor on side 2. Also the amount of IOL current that your 3.3V CFPGA can sink should be considered as well. 

    Regards,

    Tyler