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TXB0108: TXB0108 Maximum SPI Data Rate Supported

Part Number: TXB0108
Other Parts Discussed in Thread: TXB0604, TXS0108E

Hi,

We have used TXB0108 bidirectional buffer in 1.8V logic (Vcca & Vccb). In the datasheet for Vcca & Vccb = 1.8V, the maximum data rate supported is 52Mbps. Our SPI clock is 50MHz and at the output side of this buffer we are receiving only 25MHz clock output. SPI clock at 50MHZ won't work with this part? What about TXS0108? We cannot reduce SPI clock as the clock speed is fixed for the application.

We have specific reason for 1.8V on both Vcca & Vccb. Bidirectional buffer is required because we may switch to QSPI mode.

Need support from TI as soon as possible.

Regards

Hafiz Haja

  • Hi Hafiz,

    Thanks for inquiring here, QSPI is generally 6-ch (CLK, CS, 4 DATA lines). Is the 8-ch translation a requirement here? 

    Regards,

    Jack 

  • Hi Jack,

    We already implemented the circuit using 8-ch part. The issue is as explained 50MHz SPI clock is not supporting while testing. The SPI clock is fixed at 50MHZ since the SPI master is vendor configuration and cannot be reduced.

    Level translators comes as 1Bit, 2Bit, 4Bit & 8Bit mostly. Since QSPI requires 6 lines we opted for 8 channel. In the datasheet for Vcca & Vccb = 1.8v, 52Mbps was mentioned as the maximum qualified data rate. Then it is suppose so to support 50Mbps SPI data transfer right.

    Do you have 6-ch bidirectional high speed level translator solution?

    Regards

    Hafiz Haja

  • Hi Hafiz,

    There is the recently released TXB0604 that can be evaluated here. It supports 50MHz at 1.8V to 1.8V: https://www.ti.com/lit/ds/symlink/txb0604.pdf?ts=1763587772969&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FTXB0604

    However 2x devices would be needed to cover the 8-ch support that you are looking for.

    Thanks,

    Jack

  • Hi Jack,

    As explained we have already implemented 8-ch circuit using TXB0108 and assembled PCB for testing. As per datasheet 52Mbps support was mentioned and that is why we have proceeded with that part. So as per your feedback TXB0108 cannot support 52Mbps data rate mentioned in datasheet. Will there be an updation on the datasheet for the actual data rates the chip will be able to handle rather than some unrealistic values mentioned in datasheet. Can you please explain why the 52Mbps data rate support mentioned in datasheet will not work? If datasheet claims a value it should support that value in actual implementation also, right? I think TI should re-look into the datasheet for both TXB0108E & TXS0108 for the data rate values claimed. It is really confusing for designers.

    As per your feedback, we dont have any other option but to re-design PCB to have TXB0604 chip. Will there be any 8 channel part for this TXB06 series in near future?

    Regards

    Hafiz Haja

  • Hi Hafiz,

    50MHz is closer to 100Mbps here. Note that both of these devices are not rated for 100Mbps at the 1.8V voltage corner.

    TXS0108E:

    TXB0108:

    As per your feedback, we dont have any other option but to re-design PCB to have TXB0604 chip. Will there be any 8 channel part for this TXB06 series in near future?

    There is no plan as of currently. 

    Regards,

    Jack 

  • Hi Jack,

    Thanks for your feedback. What if the SPI clock frequency is 25MHz? Will TXB0108 support this data rate with Vcca = Vccb = 1.8V?

    Does TI have tested data on this?

    Regards

    Hafiz Haja

  • Hi Hafiz,

    Unfortunately no- at the time of characterization, 45Mbps was the max data rate tested at the 1.8V corner node. If you would like to test the device under the specific application setup, here is the EVM link for further eval: www.ti.com/.../TXB-EVM

    Regards,

    Jack