Part Number: INTERCONNECT-STUDIO
I am trying to create an SR latch. I added a LUT with 3 inputs, with the third input connected to the output. When I create the connection between output and input, InterConnect Studio throws an error "Logic loops with inversion that don't include any timing elements can cause oscillations". I am forced to add a delay block, and connect it to a clock source. This seems to take care of the error, but makes me wonder if it is the most efficient way to implementing a simple SR latch. Here is the circuit:
Do you have any ideas on how to improve this implementation?
Thank you!
