Part Number: TXS0102
Using TXS0102DCTR for several years as our 1.8V to 5V level shifter for HDMI DDC I2C. Recent batch of 15 boards has failures on display EDID reads. Board is intermittently misreading display EDID causing wrong resolutions or failing all together to come up.
We scope captured the I2C clock for EDID reads. It looks like the clock is bouncing on falling edges. Or getting stuck in SDA held low as hostage NACK situations. Or we see double clocks and early ACKs. Other unpredictable states are the result. The bus locks and EDID read fails.
We think it is the edge accelerators fighting. The curiosity issue is only the recent batch we built - previous boards that are identical TXS0102 work fine with same displays. Why suddenly failing? Process corner changed?
Can TI assist with debug?
- Confirm if TSX0102 can be used for 100khz I2C from 1.8V CTI carrier 1.8V into TSX out to 5V HDMI DDC extremal displays. Or is there a more appropriate part for 1.8V i2c to external HDMI 5V?
- It says TSX0102 is appropriate for the I2C applications, which specs upto 400pf bus standard but then I see in the schematic checklist app note “Typically, up to 70pF unless specified in data sheets.”
- Are the edge accelerators getting stuck for some reason on this batch of TSX0102? Some clock falls are way more pronounced spikes than others. How does the edge accelerators work?