TXB0104: Logic Level Triggered Issue

Part Number: TXB0104

 

Hello TI Team,

I am using TXB0104RGYR for bidirectional logic level translation.

Setup Connection:

  • VCCA = 1.8V

  • VCCB = 3.3V

  • A channel and B channel are connected with controller GPIOs

  • Both GPIO pins remain floating during idle condition

  • A1 channel monitored using DSO probe

Problem Statement:

  1. When B1 is connected to logic HIGH (3.3V), A1 correctly transitions from LOW to HIGH (~1.8V).

  2. HIGH transition detection works properly.

  3. However, when B1 is disconnected (floating condition), A1 remains stuck at HIGH level and does not return LOW.

  4. Additionally, when the DSO probe is disconnected and again check at A1 then shows LOW logic level correctly

  5. It appears the logic state is being retained/stuck during floating condition

Questions:

  1. Is this behavior expected with TXB0104 during floating input conditions?

  2. Does TXB0104 have issues with floating GPIO connections?

  3. Can DSO probe capacitance affect TXB0104 logic state retention?

  4. Is the internal edge accelerator or weak driver causing the output to remain HIGH?

  5. What is the recommended method to avoid stuck logic condition during floating/disconnect state?

  6. Are external pull-down resistors mandatory for stable operation in this use case?

For reference, I will attach the schematic of my application.

Please suggest the recommended hardware implementation for reliable HIGH/LOW logic detection.

Thank you.

  • Hi Haresh,

    1. Is this behavior expected with TXB0104 during floating input conditions?

    The TXB0104 utilizes a weakly buffered loop to redrive the input and output to the same, known previous state. If a default state is desired, a weakly pulldown/ pullup resistor is suggested to be used.

            2. Does TXB0104 have issues with floating GPIO connections?

    No, as the floating IO connections will drive the outputs to a known logic state. The issue arises if customer wishes to have a specific logic state, in which the above question response can be applied.

            3. Can DSO probe capacitance affect TXB0104 logic state retention?

    It is possible that the capacitance can influence the device by discharging the voltage at the TXB0104 outputs.

            4. Is the internal edge accelerator or weak driver causing the output to remain HIGH?

    The DC state is weakly held by the internal 4k series resistors. 

             5. What is the recommended method to avoid stuck logic condition during floating/disconnect state?

    To prevent these cases, it is good practice to not leave floating IOs, and weakly external pulldown/pullup to be used to ensure a known logic state during disconnect. 

            6.Are external pull-down resistors mandatory for stable operation in this use case?

    Yes, it is suggested, and the TXU0x04 can also be considered here as it supports a wider range of external pulldowns.

    Regards,

    Jack