Part Number: CD4051B
Hi,
We are in the midst of a large production quality spill caused by an un-announced (to us) parameter change in a TI product.
Industry standard practice has been that PCNs announce minor deviations to existing performance levels, not make the updated part incompatible with prior products; that level of change has been treated as an EOL event for the prior part and a new part number for the revised part.
The part in question has been in our allowed manufacturer set (3 vendors) since 2017. The inexplicable change in Vil (details below) is the cause of our quality problem. It has not been detected until recently as our specific drive level still functions as normal in almost all situations, including production test fixtures. In extreme load cases we get a small number of unexpected failures that led to this analysis (Vil<=800mV for the new device, <=4V @ Vcc=15V for earlier product; drive level ~ 950mV normally, failure detected ~1V1).
We are not a military manufacturer and so do not sample validate the datasheet parameters of each device batch prior to loading - I doubt there are (m)any electronic assembly operations that still do this.
We are probably not the only customer you have harmed with this abjectly poor behaviour.
To assist with containing other latent failures, can you please list any other TI devices that went through a similar die shrink and ended up with changes in parameters.
Details:
In 2023, TI updated the long-running CD405xB device from rev. I to J. It looks like a die shrink with significant changes in operation, namely (comparing SCHS0471I to SCHS0471K):
a) Changed Quiescent Idd.
TSSOP - Significantly increased from 5 to 60uA max 25C 5V, typ from 40nA to 17uA).
Note 1. Change actually on p6.
Other packages – Only significantly increased Idd (@20V typ 25C from 80nA to 18uA).
Note 1. Change actually on p11.
b) TSSOP - Increased the typ off channel leakage, x40.
Note 1. Change actually on p7.
Other packages – no change (p12)
c) TSSOP - Increased the max on channel leakage, x2.7.
Note 1. Change actually on p7.
Other packages – no change (p12)
d) TSSOP - Changed the Vil levels from CMOS ratioed to Vcc to fixed <800mV.
Change is on p8.
This is not an 'update', it is a NEW DEVICE;
This alone renders the device incompatible with some contemporaneous driving circuits in long-running production circuitry. IT IS NO LONGER COMPATIBLE with earlier CD4051 or current production OnSemi & ST equivalents.
Other packages – no change (p14)
e) TSSOP - Increased the max input current, x10.
Note 1. Change actually on p8
Other packages – no change (p13)
f) Stated Typ timing change, Inh-out turn off
TSSOP - p9; no change in any max timing values
Other packages – no change in any max timing values (typ, 15V up to 90ns) (p14)
g) Updated ESD ratings
All packages other than TSSOP, no change.
TSSOP - Note 1
h) Updated typical characteristics
Note 1. Change actually on p16; lost 5x channel resistance graphs
Note 1: This is not an 'update', it is a downgrade to a worse process.
Rev L consolidates datasheet double speak by stating that tables were consolidated across packages. THIS MOVES THE SIGNIFICANT DEGRADATION IN rev.J TSSOP PARAMETERS TO ALL DEVICES (a-h above).
This is not a consolidation or an 'update', it is a NEW DEVICE.
TI SHOULD HAVE EOLed CD405x devices in non-TSSOP packages at this point.
