Part Number: TPLD2001
Hello,
I would like to use TPLD2001 as specific SPI-GPIO expander.
But I`m absolutelly messed with SPI functionality description in all TI documentation (Datasheets and Applicetion Briefs). There are no any project examples also...(
See screenshot from TPLD2001-Q Datasheet below.
As I understand Register Address (A7-A0) is "offset" defined in table bellow.
For my case it`s 0xE0 and 0xE1 for Virtual Inputs and Virtual Outputs.
But what is "offset"? Offset from what? From "Extended Address"?
But there are no any description of term "Extended Address" in documentation .
Could you provide real SPI frame structure with normal explanation of each data fields, please?
-- Best Regards,
Victor
P.S.
InterConnect Studio 1.7.5+1485 have a bugs.
Schematic from PDF report looks cropped. Only 3 pins!
Amazing software quality...