• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 18 subscribers
  • Views 215 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Question on DDR3 RDIMM

Phanindra Eranki
Prodigy 10 points

I am validating the DDR3 RDIMM controller using the Micron DDR3 RDIMM component MT9JSF12872.

I would like to know For the DDR3 register on the RDIMM, does it pass through commands to the components regardless of the parity input?  I.e., if the parity is incorrect, does it stop normal behavior, or does it just pass everything through regardless of the parity input?

For the current design I tied the Parity pin to ‘0’ and the Err_out signal is asserted as soon as out of the reset, there is no response from the component to any of the memory commands. I have verified the logic levels of all the commands going to memory component are correct.