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RESET SCHEME OF PROCESSOR

DEEPAN CHAKRAVARTHY
Prodigy 60 points


HI,

THIS IS MY RESET SCHEME OF THE PROCESSOR MODULE.

The system reset and power ok (power ok is not shown in schematic) will be asserted by the carrier board. when the processor module is inserted in the carrier board it will take some time to stabilize the power in the processor module .

My doubt is ... what will happen when the system reset and power ok from the carrier board is asserted before the power to the AND gate is given, will it cause any problem...