This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Driving IO pins of SN74LV08APWR before applying Vcc

Other Parts Discussed in Thread: SN74LVC8T245

Hi,

We are using SN74LV08APWR in our design.  I need some clarification generic to the CMOS Gates.  What will happen if the IO pins were driven before applying power supply to the Vcc pins.  If the IO pin is driven by an independent 3.3V source other than the one driving the Vcc pin, will the voltage present on the IO pin will couple to the Vcc pin by internal latching?

Thanks and Regards,

Kiruba

  • Hi Kiruba

      SN74LV devices Have the Ioff feature wich means the I/O pins are High impedance if Vcc is 0V. Ther is no clamp diode to Vcc so the part will not back power.

    As long as Vcc is 0V then it is Ok to have a voltage on the inputs or outputs and there will be no leakage. see Ioff spec in datasheet.

  • Hi Chris,

    Thanks for your immediate and valuable guidance.  I just browsed the net to understand the Ioff but not found something suits my search.  What should be the expected values of the Ioff to ensure that there is no back power in the board.  I am already facing a back powering issue in one of my ADC board which has Multi voltage VIRTEX-6 and VIRTEX-5 FPGA and along with some couple of SN74LVC8T245RHLR.  It will be very much helpful if you throw lights on how to debug the back powering issue to identify the source of the problem.

    Regards,

    Kiruba

  • Normally backpowering the device is caused by a clamp diodes to Vcc. Thes clamp diodes are designd in on some parts for overshoot protection and they are just parasitic on other parts. These diodes will turn on when the input or output go above Vcc or below gnd. If the input is above Vcc it will back power the device.

      Ways to tell if the part has a clamp diode is to look at the Iik and Iok value specd in the absolute max ratings in the datsheet. if it is +/- then it has clamp diodes to Vcc and gnd, if it is only - then is only has a clamp diode to gnd.  Even if the part does not have a clamp diode there may be a parasitic that can cause leakage if the I/O is above Vcc.  The Ioff feature prevents this. see attached.

    If the part has the Ioff feature then there is a circuit that sets the inputs and outputs to high impedance when Vcc is 0V and there is no way for leakage. However Vcc must be at 0V. the Ioff circuit fails to work somewher around .5V.

    The SN74LVC8T245 has Ioff also and should not be able to backpower.  Is Vcc at 0V or is it stuck at some intermediate level? 

     

    Ioff Supports Live Insertion.docx
  • Hi Chris,

    In my board I have three supplies 1.8V, 2.5V & 3.3V.  I am sequencing these power supplies with a sequencer (along with a MOSFET switch with unsequenced supplies connected to Drain and sequenced supplies taken from source ).  When I switch on 1.8V and 2.5V I see approximately 1.5V at 3.3V sequenced power supply. 

    Regards,

    Kiruba

  • this is how it looks like.

    Regards,

    Kiruba

  • Please refer the attached snap shot.

    Regards,

    Kiruba

  • I am not sure what is going on. It looks like the 3.3 Vcc begins to rise about 4ms earlier before the 2.5V supply come on. Why does this happen.

     

     In order for the Ioff circuit to work correctly Vcc must be 0V.

  • I am analyzing the circuit for the possible root cause.   Thanks for your detailed explanation about the Ioff and Back powering.  It was really helpful.

    Thanks and Regards,

    Kiruba