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How to handle unused pins on a SN74LVC4245A OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER

Chris Andrew
Prodigy 10 points
Other Parts Discussed in Thread: SN74LVC4245A

Hi I am using a SN74LVC4245A for level shifting from 5V to 3V3 to drive a LCD. I am only using four of the 8 channels for data lines, I am not clear how to tie the remaining channels to avoid oscillation etc. The datasheet says:

All unused inputs of the device must be held at the associated VCC or GND to ensure proper device operation. Refer to the TI
application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004


The problem is that the data lines are both transmit and receive, depending on the DIR pin, so how do I handle the spare channels? Thanks for any advice.

  • 0
    TI__Mastermind 30310 points

    Chris,

    The spare channels are not directly related to this part of the datasheet. This quotation of the datasheet refers to the inputs of active channels that for some reason may be un-used at a given time during operation.

    Say, for example, that you are using channels 1-4 and not channels 5-8.

    If for some reason, one of the channels 1-4 were not at a valid logic level (GND or VCCA/B), then the state is indeterminate and there is an excess of current consumption because the inverter input circuit has both FETs on. Designer's often use a weak pull-up or pull-down resistor to avoid a floating input. We have a line of translators with an "H" in the part number that has a feature called active bus-hold circuitry which eliminates the need for these resistors. Although the part you are referring to does not have an "H" version, this is another App Note on the topic:

    http://www.ti.com/lit/an/scla015/scla015.pdf

    Channels 5-8 in this example, ideally, are not relevant to this because they are completely unused. But, to be absolutely sure there is low current draw on these pins, I suggest using a weak pull-down resistor to GND for all 8 unused pins as opposed to a No Connect.

    -Brian