Hi,
I want to use the SN74AVC1T45 as a level translator for a clock signal (1MHz max.). What is the maximum output rise and fall time of the SN74AVC1T45? It should be below 6ns for my application.
Thanks.
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Hi,
I want to use the SN74AVC1T45 as a level translator for a clock signal (1MHz max.). What is the maximum output rise and fall time of the SN74AVC1T45? It should be below 6ns for my application.
Thanks.
True, that's the propagation delay which can, depending on the voltages, be far above 6ns.
The maximum rise time is given in ns/V, (p.4, here 5ns/V) so it depends on your operating voltage.
That is at the input: the input transition rise/fall rate. Explained here: http://e2e.ti.com/support/logic/f/150/t/15642.aspx
I'm interested in the maximum rise/fall time of the output drivers.
May I suggest using the data rates as a guideline to reassure you that the rise/fall time is sufficiently fast?
Although the rise and fall time depend on the load capacitance (see page 13 on the datasheet for the test load), the front page of the datasheet says the maximum data rate achieved at different voltage translation levels.
The lowest data rate shown is 240Mbps.
Your 6ns rise/fall time corresponds to a total time period of at least 12ns, or a maximum frequency of 83MHz.
If the part can pass data at a rate of 240Mbps under the tested loading conditions, it has a frequency of at 120MHz and therefore a rise and fall time must be less than 6ns.
Please ensure the load being driven by the SN74AVC1T45 is approximately the same as the test loading condition. If the load capacitance is too high, rise/fall times will be longer.
-Brian