Is there some kind of fifo buffer whose contents can be accessed, not just the word at the end of the pipeline but the internal words. Say it's 4096 x 16, so you need like 11 bits or pins to tell the chip which particular word you want to access. Or maybe do any ADCs with memory have this sort of functionality. I don't want a digital signal processor or something else that needs to be programmed in software. It would also be useful to have a memory buffer in which all of the contents at any one time are added on the chip, and the result of the summation is provided at the output pins. The next clock tick when a new word is entered at the input, the sum is re-added. I would prefer any such chips to be for prototyping, as in DIP not surface mount.
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