Hello,
Does TI offer any solution for the following bus-switch based level translation?
Ideally 3.3V supply.
Pass all signal levels in the range 0V to 3.3V to the other side.
Pass all signal levels in the range 3.3V to 5V as 3.3V to the other side (i.e. cut at 3.3V).
Application: Connect current PLD device I/O pins (no 5V tolerance) to a 3.3V/5V (LVTTL/TTL) bidirectional I/O interface.
We took a look at the following bus-switches, please see comments.
CBT-C --> No simple 3.3V supply. Otherwise may fit.
CBTLV --> No 5V signal support
CB3Q --> VCC of 2.3V (= minimum) does not guarantee 3.3V max pass level (pass level may be higher).
3.5V pass voltage may already stress PLD/FPGA I/O pins.
CB3T --> Looks good on paper, but not in measurement.
VCC = 3.3V.
5V signals are passed as 3.3V alright.
But 3V signals are passed as 2.1V ... 2.3V, highly depending on the leakage current (very high RON), and are not passed as 3V.
Take a look at SCDA008 figure 33.
This figure seem to imply that approx 1V will get lost across the switch (U = R x I), which matches our measurements. I.e. we do not like the way the CB3T passes 3V signal levels.
Any recommendation?
Thanks,
