Hi,
We are using one interface in our design at 148.5MHz where the timings on this path are not being met.
The first device (A) gives out data at the negative edge and the second device (B) captures at the positive edge.
The clock to output delay of A varies from 1.64 to 5.387ns.
The minimum setup and hold times required for B are 1.3 and 0.8ns respectively.
As per the timings, the ideal time for sampling the data will be at the negative edge, but as device B captures at the positive edge, the timings are not being met.
So, I need a zero delay inverting buffer for a signal with a frequency of 148.5MHz. The inverter must have its maximum propagation delay lower than 0.84ns.
(1) Can you please suggest me some suitable zero or low delay (lesser than 0.84ns) inverting buffer?
(2) Can you suggest me a device like a buffer or a reclocker or a registered buffer for this frequency, which can capture data at the negative edge?
(3) Can you suggest me some non-inverting buffer or a delay line which can provide a fixed amount of propagation delay of around 4ns or 10ns with a low tolerance (lower than +/-450ps)?
Regards,
Prachi
