Hi,
The SN74LVC1T45 datasheet states:
"The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance
state".
This is also reflected by the parameter I_off in the electrical characteristics table. However, I_off is only specified for ports A and B.
My question:
Is the direction pin DIR also in high-impedance state if either VCC is at GND?
Best regards,
Jonas