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Shifting down clk signal

Huanhuan Zhang
Prodigy 70 points
Other Parts Discussed in Thread: ISO7220B

Hi, I have a 1MHz clk signal generated by MSP430 with VH=3.6V, VL=GND. I want to change the clock signal to the one with VH=2.5V and VL=-2.5V. Based on the datasheet of ISO7220B, it seems OK to fulfill this translation. I just want to make sure is it ok to connect Vcc1 to 3.6V, GND1=0, Vcc2=2.5V and GND2=-2.5V? I tried to do simulations in TINA, but failed to find ISO7220B.