Hi , I am thinking using a SN74AUC240 (or similar from AUC family) to monitor a 200Mhz bus (between a host controller and a DUT) , running in DDR mode. The tapped bus has IO at 1.8V and AUC output going to a FPGA with about 6 inch twisted cable (one in pair is GND). So we need a bandwidth of 400Mbs. Critical is the input impedance and capacitance of the AUC, not to perturb the bus.
Before we used an AVC and ALVC buffer to perform similar function, but at lower speed.
Some questions I have:
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Is indeed the AUC the fastest logic available?
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Do you see any problem in using this device at 200 MHz DDR?
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Can be better a SN74AVCH32T245 or similar ? This is listed at 500Mbps, but I think is a mistake , because narrower bus width devices in same family are listed at 380Mbps
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I don’t like too much the 5uA and 2.5pF at inputs...A device with FET input will be ideal, but I guess is not easy to find something like this in the logic area?
Thanks,
Mike
