SN74LVC4245 external circuit

Hi Byoungkil,

I am moving this thread to the appropriate forum where someone can get in contact with you. 

Interface -> /etc -> Voltage Level Translation Forum.

Thanks,

Alex

Hello,

As mentioned above, this is about Hot-Swap applicaions.

Study of Hot-swap about Vcc  is almost completed, and hot-swap about signals(data, control) is remained.

Our system is as follows;

Data and Control signals from(to) CPU are +3.3V and that signals to(from) backplane are +5V.

So, I selected the 74LVC4245 Dual Vcc transceiver.

In the TI document "SCEA026-Logic in Live-Insertion Applications.",

LVC-Logic is Level-1 isolation(Partial Power Down), and our system can provide level-1 isolation.

In order to provide a level-3 isolation, does our system need the external PU3S, precharge circuit?

Then, Can I implement the PU3S and precharge circuit?

Please contact to my question.

regard,

Byoungkil.

Hi Byoungkil,

You should look at the devices that support Level 3 isolation natively. Example: SN74GTLPH306

Let me know if this device does not match your application and I will try to find you another one.

Thanks!

-Ryan

As mentioned above,

Our system is as follows;

Data and Control signals from(to) CPU are +3.3V and that signals to(from) backplane are +5V.

So, I selected the 74LVC4245 Dual Vcc transceiver.

When we use 74LVC4245 as backplane bus transceiver, can't we offer level-3 isolation?

And in the page 8 on the TI document(SZZA033), there are mentions about using 74LVC4245.

Then, if we obey that power-up sequence, can we provide more higher level isolation than level-1 isolation?

Finally, I want to know whether 74LVC4245 as backplane transceiver is a possible for hot-swap application or not.

And, TI has level-3 isolation transceiver with dual power supplies?

regard,

Byoungkil.