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questions on LSF0108

Other Parts Discussed in Thread: LSF0108

Hello,

I would like to ask you a few questions regarding LSF0108:

1. In 10.2.1.2.1 of the datasheet, it talks about outputs A3 and B4 in Fig 6, but there is no A3 and B4 in Fig 6, which figure or which pins in which figure they refer to?

2. In 10.2.1.2.1 of the datasheet, it talks about push-pull or open -drain, please confirm the following: for push-pull, the RL is connected between the output pin and the ground; for open-drain, the RL is between the output and Vpu.

3. Can the FPGA LVCMOS 2.5V output directly connect to the input pin Ax without pull-up, or pull-down?

4. In Fig 9 on page 15 of the datasheet, Vref_B and EN is connected to a power supply, should it be Vpu? OR Vpu = Vref_B =VEN?

5. What is value for the capacitor which connect to EN?

The system is the following:
(FPGA, LVCMOS 2.5V output) -> (voltage translator: LSF0108) -> (50 ohm to ground for impedance match in a coax cable) ->(5V TTL input 54F68).


  • Hi Mark,

    1. I think that this statement should refer to Figure 9 instead. The outputs on the A-side have a maximum value of Vref_A in this case. I will double-check this statement with the datasheet author.

    2. Pullups are needed on the B-side of the LSF device for both push-pull and open drain. There is no need for a resistor to GND. For either push-pull or open drain, there is no need for an A-side pullup unless translating down from B to A to a voltage other than Vref_A.

    3. Yes.

    4. Vref_B and EN should always be tied together and connected to a voltage source through a 200k resistor. In most cases, VPU can be tied to Vref_B. However, if you want to translate to a different voltage level, Vpu does not have to equal Vref_B.

    5. 0.1 uF is a standard value. It is intended to filter noise.

    We have published a new app note on the operating theory of the LSF devices. It may be very useful for your customer. See http://www.ti.com/lit/pdf/slva675