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SN74LVC8T245 and SN74LVCH16T245 pull-up resistors?

Kevin Morfitt40
Prodigy 40 points
Other Parts Discussed in Thread: SN74LVC8T245, SN74LVCH16T245

I need to convert I/O signals between a 5V ASIC and a 3.3V FPGA. I was planning to use the SN74LVC8T245 with VCCA = 3.3V and VCCB = +5V. The ASIC will tristate its I/O signals for lengthy periods of time, and I'll need to tristate the SN74LVC8T245 signals for lengthy periods of time using OE, and I'm concerned about how to avoid excessive current consumption.

I'm thinking of adding pull-up resistors to the SN74LVC8T245 I/O pins on both the VCCA and VCCB sides to force the I/O signals to valid states. If I do this, will this avoid excessive power consumption when I use OE to tristate the I/O signals, and also when the ASIC tristates its own I/O signals?

I've also looked at using the 16-bit SN74LVCH16T245 device to reduce component count. As far as I can see the Bus Hold function will force the I/O signals to defined states except when OE is used to tristate the signals. As this device has Bus Hold functionality I assume I can't use pull-up resistors to force the signals into valid states when the SN74LVCH16T245 is tristated? Is there any other way around this tristate problem, apart from not tristating the I/O signals?

  • 0
    TI__Genius 9860 points
    Hi Kevin, yes, using the OE pin will help you avoid power consumption when the I/Os are tri-stated. There would be very little current leakage in this state.

    The Bus Hold feature only applies to the inputs. When the pins are set as inputs, they are high-Z anyway so there is no concern of significant leakage there. However, the Bus Hold circuit is always active and will consume some static current (see the IBH specs) to force the inputs to a voltage rail. Pullups are not recommended for bus hold circuits, as they can "fight" with the bus hold circuitry and cause oscillation.
  • 0 in reply to C. Ryan Land
    Prodigy 40 points
    Thanks for the very quick reply!

    Sorry, I didn't phrase my question clearly. I raised my question because I read another post (e2e.ti.com/.../116333) that says there would be problems with excessive ICC and ICCZ current if I disable the SN74LVC8T245 I/O signals using OE. Also, the data sheet says that "The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ."

    To avoid these problems I was thinking of adding pull-up resistors on all I/O signals.

    Is this OK, or would pull-ups cause problems with the SN74LVC8T245 (I'm not sure if it has any internal pull-ups etc)?

    Would pull-ups also avoid the excessive ICC and ICCZ current when I disable the SN74LVC8T245 I/O signals using OE?
  • 0 in reply to Kevin Morfitt40
    TI__Genius 9860 points

    Hi Kevin, yes, it is a good idea to add pullups to the outputs. I understand your question a little better now - a transceiver acts as a configurable buffer, where each side can be configured as an input and output. It is bad to float an input pin because there could be a partial turn-on of the transistors, causing some current to go from VCC to GND. See this app note for more information: http://www.ti.com/lit/an/scba004c/scba004c.pdf

     

    Even though you can, at times, configure the ports as outputs, and the input will be disabled in this case, the input transistor structure is still physically present and still is susceptible to the current flow described in the app note.

     

    The device does not have any internal pull ups. They should not cause any issues as long as the pullups limit the current the clamp current ratings of 50 mA (a pullup of 10k ohms is very sufficient).