As per the link.
There is contradictions as per the explanation in voltage comparison operation in the same dcument, or it might be that I am not able to capture the explanation in the conciseness of words.
On page 6 in section "8.3 Feature Description" text as follows
"The output consists of an open drain NPN (pull-down or low side) transistor. The output NPN will sink current when the positive input voltage is higher than the negative input voltage and the offset voltage"
What I extracted as meaning from these words that when voltage at positive pin exceeds the negative pin the output is shorted to ground, driven low or it will remain pulled up via a resistor.
But on the page 7 under the section "9.2.2.1 Input Voltage Range" following text provides the contradiction.
"1. When both IN- & IN+ are both within the common mode range:
(a) If IN- is higher than IN+ and the offset voltage, the output is low and the output transistor is sinking current
(b) If IN- is lower than IN+ and the offset voltage, the output is high impedance and the output transistor is not conducting ".
Kindly clarify the anomaly if it exists and help in enhancing my understanding
