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TXS0108E driving capability

Timothy Starr
Expert 2445 points
Other Parts Discussed in Thread: TXS0108E

Hello-

We are using the TXS0108E to drive a reset pin of an optical module which has an internal pulldown between 4.7K and 10K Ohms. It is translating from 1.2V (on the FPGA side) to 3.3V (on the optical module side). We are not getting a reliable high state. We have tried using a 4.75K pull up resistor, and that seems to work on a few samples, but fear that as a result, sometimes we will not get a reliable low voltage state.

The data sheet is characterized at output currents which do not support any significant load (e.g., 20 uA high and 400uA low @ 3.0V). We need to know what logic levels are guaranteed when there is 215uA (high) or 509A (low) load. I have an attachment showing the problem but I couldn't paste it here; that feature does not work. There is also a note at the bottom of page of page 14 which seems to have nothing to do with the specified output current and logic levels, speaking about pull ups internal to the part, which vary depending on the state. Do the output currents include the current required to drive these internal pull-ups, or is does that need to be accounted for separately? 

We believe we must add a pull up resistor on the 3.3V side of this device to make it work. What is the optimum value of that resistor, and does it guarantee meeting logic levels of 0.8V low and 2.0V high, which is the optical module specification? We are assuming 3.3V nominal could be 3.0-3.6V worst case.

Thanks and Best Regards,

-Tim Starr on behalf of OA@CD; please contact timothy.starr@avnet.com

  • 0
    TI__Expert 5815 points
    Hello Tim,

    I have moved your post to the Voltage Translation forum. Would you have any scope shots highlighting the problem by any chance?

    Thanks,

    Sem
  • 0
    Expert 2445 points

    ideas for driving reset 061615.pptHi Sem-

    The problem seems to be solved with a 4.75K resistor pull up, where we meet logic level requirements with some measured margin. As far as having scope shots we could send you, we do not, and right now we don't have any of the boards on hand, so we are trying to figure this out through  worst case analysis. Refer to the attached for our latest thoughts/calculations. You don't have any spice type simulation models do you?

    I lieu of that, could you please provide the value of R1, R2 and the RdsON of the Npass transistor? Refer to Figure 5 in the data sheet. That way we can complete our analysis. Thanks and Best Regards,

    -Tim

  • 0 in reply to Timothy Starr
    TI__Intellectual 2530 points

    Hi

    • The series resistance values of R1 and R2 are 150Ω (typical).
    • n- channel pass gate Rdson is at 100 Ω typ, 250 Ω max
    • Detailed application note is below:

    http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=SCEA044&fileType=pdf

    • Rpua and Rpub have a value of 40 kΩ when the output is driving low. Rpua and Rpub have a value of 4 kΩ when the output is driving high. Rpua and Rpub are disabled when OE = Low. If Voh is not high enough, you can parallel a resistor (smaller than the internal 4k), which will have less voltage drop on the output pin and thereby achieve smaller RC time constant. But at the same time your VOL will be higher.

     

    Thanks