Low power shift register

Hello Gary ,

There are numerous choices for lower power shift registers at TI . I can give couple of suggestions here below  :

CD74HC164 has 80uA Max Icc consumption .

SN74LV164A has 20uA Max Icc consumption .

http://www.ti.com/product/CD74AC164/compare# . Using this link , you can select appropriate devices suitable for your application based on various input criteria .

Please let me know if this helps .

The following circuit should start all outputs low and allow the feedback loop you wanted:

I have configured the SN74LVC2G132 above into a 'AND' gate -- I drew both NAND gates for clarity of the design.

When Vcc is turned on, the gates will all be powered on, but the input to A will be much slower than the others.  The output to CLR\ will be zero when the system is turned on because A is zero -- regardless of the B value, the CLR\ line will be forced low until A goes high.  Once A is high, B will control the CLR\ output -- when B is low, CLR\ is high, and when B is high, CLR\ is low.

Note that I have selected a device with Schmitt-trigger inputs because the RC input will be very slow and could cause problems if a Schmitt-trigger is not used.