OR Gate

Do you think you can work on SN74LVC2G32 device . This is dual 2 input OR gate which works from 1.65V to 5.5V range suited for your applications.

So my question here then is, on the controller(s) side, do I need to make sure they pull the pins down or should they tri-state them? Basically there are going to be two controllers that will access the same SPI device, however at no time will this happen simultaneously. In fact, one of the controllers will tell the other when to stop sending data before it takes over.

I may not have understood your question all that well , any schematics might be helpful.
what are the inputs for OR gate ? All to care about is not to have race conditions on outputs.