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SN74AVC32T245 Supported Maximum Clock Frequency

Other Parts Discussed in Thread: SN74AVC32T245
Hi,
Does SN74AVC32T245 work at the 150MHz as the clock frequency normally when transrating the 3.3V cmos logic signal to the 1.8V cmos logic signal ?
We understood that it is difficult to work at 150MHz as below.
So, could you please suggest the good solution if not possible ?
<Requirement>
Bit Width               : 32bits(or 16bits + 16bits)
Maximum Clock Frequency : 150MHz
Translation             : 3.3V to 1.8V
Input Voltage           : 3.6V tolerant
Best regards,
Kato
  • Hi Kato-San ,

    I will move this into translation for now .
  • Hi Shreyas-san,

    Thank you for moving my post.
    I am looking forward to hearing from your colleague.

    Best regards,
    Kato

  • Hello Kato-san,
    I am not sure what your concern is? You specified level shifting from 1.8V to 3.3V for 32 bits at 150MHz, and the SN74AVC32T245 supports 380Mbps (190MHz) for that condition. Can you expand on your question?
    -Francis Houde
  • Hi Francis-san,

    Thank you for your quick response.
    Is my understanding correct although I understood that SN74AVC32T245 supports 1.8V to 3.3V Level-Shifting at 380Mbps(clock:380MHz, data:190MHz) and 3.3V to 1.8V Translation at 200Mbps(clock:200MHz, data:100MHz) ?
    Our customer can use SN74AVC32T245 if it is correct.
    So, would you suggest other proper soultions if you have the smaller package size ?
    Could you please give me your advice about it ?

    Best regards,
    Kato

  • Hello Kato-san,
    I think I see the reason for the confusion. The 200Mbps is for translation from less than (<) 1.8V to 3.3V, if you are using 1.8V to 3.3V then the data rate is 380Mbps in either direction.
    -Francis Houde
  • Hi Francis-san,

    Thank you for your advice.
    I understood that the maximum data rate is more than 200Mbps(the level-shifting:380Mbps, the translation:200Mbps) if VCCA and VCCB are more than 1.8V.
    So, I have two questions.
    Is the maximum data rate equal for both A-port to B-port and B-port to A-port if the power supply voltage for VCCA and VCCB is equal although the delay time is different between A-port to B-port and B-port to A-port ?
    In addition, could you please tell me the maximum load capacitance to satisfy the maximum data rate(380Mbps@1.8V and 200Mbps@1.8V) for the output terminals?

    Best regards,
    Kato